On Fri, Nov 15, 2024 at 12:46:05PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Nov 01, 2024 at 03:06:10PM +0800, Richard Zhu wrote:
> > Add ref clock for i.MX95 PCIe here, when the internal PLL is used as
> > PCIe reference clock.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
> > Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
> > ---
> > arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++----
> > 1 file changed, 14 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > index 03661e76550f..5cb504b5f851 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > @@ -1473,6 +1473,14 @@ smmu: iommu@490d0000 {
> > };
> > };
> >
> > + hsio_blk_ctl: syscon@4c0100c0 {
> > + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> > + reg = <0x0 0x4c0100c0 0x0 0x4>;
> > + #clock-cells = <1>;
> > + clocks = <&dummy>;
>
> What does this 'dummy' clock do? Looks like it doesn't have a frequency at all.
> Is bootloader updating it? But the name looks wierd.
dummy clock is not used for this instance, which needn't at all. Leave here
just keep compatible with the other instance.
Some instance of "nxp,imx95-hsio-blk-ctl" required input clocks. but this
one is not, so put dummy here.
Frank
>
> - Mani
>
> > + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> > + };
> > +
> > pcie0: pcie@4c300000 {
> > compatible = "fsl,imx95-pcie";
> > reg = <0 0x4c300000 0 0x10000>,
> > @@ -1500,8 +1508,9 @@ pcie0: pcie@4c300000 {
> > clocks = <&scmi_clk IMX95_CLK_HSIO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> > + <&hsio_blk_ctl 0>;
> > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > @@ -1528,8 +1537,9 @@ pcie0_ep: pcie-ep@4c300000 {
> > clocks = <&scmi_clk IMX95_CLK_HSIO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> > + <&hsio_blk_ctl 0>;
> > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > --
> > 2.37.1
> >
>
> --
> மணிவண்ணன் சதாசிவம்
