On 2024-11-12 18:27, Stephan Gerhold wrote:
On Tue, Nov 12, 2024 at 04:49:38PM +0100, Barnabás Czémán wrote:
From: Otto Pflüger <otto.pflueger@xxxxxxxxx>
Add initial support for MSM8917 SoC.
Signed-off-by: Otto Pflüger <otto.pflueger@xxxxxxxxx>
[reword commit, rebase, fix schema errors]
Signed-off-by: Barnabás Czémán <barnabas.czeman@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/msm8917.dtsi | 1974
+++++++++++++++++++++++++++++++++
1 file changed, 1974 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi
b/arch/arm64/boot/dts/qcom/msm8917.dtsi
new file mode 100644
index
0000000000000000000000000000000000000000..cf0a0eec1141e11faca0ee9705d6348ab32a0f50
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi
@@ -0,0 +1,1974 @@
[...]
+ domain-idle-states {
+ cluster_sleep_0: cluster-sleep-0 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x41000023>;
+ entry-latency-us = <700>;
+ exit-latency-us = <650>;
+ min-residency-us = <1972>;
+ };
+
+ cluster_sleep_1: cluster-sleep-1 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x41000043>;
+ entry-latency-us = <240>;
+ exit-latency-us = <280>;
+ min-residency-us = <806>;
+ };
I think my comment here is still open:
This is strange, the deeper sleep state has lower timings than the
previous one?
+
+ cluster_sleep_2: cluster-sleep-2 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x41000053>;
+ entry-latency-us = <700>;
+ exit-latency-us = <1000>;
+ min-residency-us = <6500>;
+ };
+ };
+
[...]
+ restart@4ab000 {
+ compatible = "qcom,pshold";
+ reg = <0x004ab000 0x4>;
+ };
This one too:
You have PSCI for shutting down, do you actually need this?
+
+ tlmm: pinctrl@1000000 {
+ compatible = "qcom,msm8917-pinctrl";
+ reg = <0x01000000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ gpio-ranges = <&tlmm 0 0 134>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
[...]
+ sdc1_clk_on: sdc1-clk-on-state {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ sdc1_clk_off: sdc1-clk-off-state {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ sdc1_cmd_on: sdc1-cmd-on-state {
+ pins = "sdc1_cmd";
+ bias-disable;
+ drive-strength = <10>;
+ };
+
+ sdc1_cmd_off: sdc1-cmd-off-state {
+ pins = "sdc1_cmd";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ sdc1_data_on: sdc1-data-on-state {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ sdc1_data_off: sdc1-data-off-state {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ sdc1_rclk_on: sdc1-rclk-on-state {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+
+ sdc1_rclk_off: sdc1-rclk-off-state {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+
+ sdc2_clk_on: sdc2-clk-on-state {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ sdc2_clk_off: sdc2-clk-off-state {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ sdc2_cmd_on: sdc2-cmd-on-state {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ sdc2_cmd_off: sdc2-cmd-off-state {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
These are not referenced anywhere? Not here in the sdhc_X nodes, and
also not in your msm8917-xiaomi-riva.dts. Would also recommend
consolidating these to a single node like in msm8916.dtsi, see commit
c943e4c58b2f ("arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl").
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c943e4c58b2ffb0dcd497f8b12f284f5e8fc477e
+
+ sdc2_cd_on: cd-on-state {
+ pins = "gpio67";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ sdc2_cd_off: cd-off-state {
+ pins = "gpio67";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
It does not make sense to have different on/off states for the card
detect (CD) pin of the SD card. It needs to work even when the SD card
is suspended so we can detect insertions/removals. Also should be
placed
in the board-specific DT part.
I have made these based on this
https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.9.6.2.r1-04800-89xx.0/arch/arm64/boot/dts/qcom/msm8917-pinctrl.dtsi
See commit dfbda20dabaa ("arm64: dts: qcom: msm8916/39: Fix SD card
detect pinctrl").
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dfbda20dabaa1f284abd550035db5887384c8e4c
+
+ sdc2_data_on: sdc2-data-on-state {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ sdc2_data_off: sdc2-data-off-state {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
[...]
+ blsp1_i2c4: i2c@78b8000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b8000 0x500>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ dmas = <&blsp1_dma 10>, <&blsp1_dma 11>;
+ dma-names = "tx", "rx";
+ pinctrl-0 = <&blsp1_i2c4_default>;
+ pinctrl-1 = <&blsp1_i2c4_sleep>;
+ pinctrl-names = "default", "sleep";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ blsp2_i2c5: i2c@7af5000 {
This is actually blsp2_i2c1 if you look at the clock name below:
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x07af5000 0x600>;
+ interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
here ^
But I realize now that the pinctrl functions are consecutively numbered
without the BLSP number. Sorry for the confusion.
Basically:
- blsp1_i2c2 == blsp_i2c2
- blsp2_i2c1 == blsp_i2c5
Looking at some other examples upstream I guess you can choose between
one of the following options:
1. msm8974/msm8976/msm8996/msm8998: Use &blspX_i2cY labels for the
i2c@
node and pinctrl and only have the slightly confusing pinctrl
function. E.g. this in msm8976.dtsi:
/* 4 (not 6!) interfaces per QUP, BLSP2 indexes are numbered (n)+4
*/
blsp2_i2c2_default: blsp2-i2c2-default-state {
pins = "gpio22", "gpio23";
function = "blsp_i2c6";
drive-strength = <2>;
bias-disable;
};
Note how blsp2_i2c2 == blsp_i2c6.
2. msm8994: Use &blspX_i2cY labels for the i2c@ node, but keep pinctrl
named &i2cN_default. E.g. this in msm8994.dtsi:
blsp2_i2c1: i2c@f9963000 {
/* ... */
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c7_default>;
pinctrl-1 = <&i2c7_sleep>;
/* ... */
};
Note how blsp2_i2c1 == i2c7_default here.
3. msm8953: Use &i2c_N labels everywhere like on downstream. E.g. this
in msm8953.dtsi. This is pretty much what you had originally:
i2c_5: i2c@7af5000 {
/* ... */
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c_5_default>;
pinctrl-1 = <&i2c_5_sleep>;
/* ... */
};
All of these are fine for me. Feel free to pick the one you prefer. But
let's not introduce a new confusing variant of this. :-)
Thanks,
Stephan
