On Thu, Nov 07, 2024 at 07:15:00PM +0800, Jacky Chou wrote:
> The AST2700 is the 7th generation SoC from Aspeed, featuring three GPIO
> controllers that are support 64-bit DMA capability.
> Adding features is shown in the following list.
> 1.Support 64-bit DMA
> Add the high address (63:32) registers for description address and the
> description field for packet buffer with high address part.
> These registers and fields in legacy Aspeed SoC are reserved.
> This 64-bit DMA changing has verified on legacy Aspeed Soc, like
> AST2600.
> 2.Set RMII pin strap in AST2700 compitable
> Use bit 20 of MAC 0x50 to represent the pin strap of AST2700 RMII and
> RGMII. Set to 1 is RMII pin, otherwise is RGMII.
> This bis is also reserved in legacy Aspeed SoC.
>
> Signed-off-by: Jacky Chou <jacky_chou@xxxxxxxxxxxxxx>
...
> @@ -1965,16 +1980,27 @@ static int ftgmac100_probe(struct platform_device *pdev)
> dev_err(priv->dev, "MII probe failed!\n");
> goto err_ncsi_dev;
> }
> -
> }
>
> if (priv->is_aspeed) {
> + struct reset_control *rst;
> +
> err = ftgmac100_setup_clk(priv);
> if (err)
> goto err_phy_connect;
>
> - /* Disable ast2600 problematic HW arbitration */
> - if (of_device_is_compatible(np, "aspeed,ast2600-mac"))
> + rst = devm_reset_control_get_optional(priv->dev, NULL);
> + if (IS_ERR(rst))
Hi Jacky,
Should err be set to ERR_PTR(rst) here so that value is returned by
the function?
> + goto err_register_netdev;
> +
> + priv->rst = rst;
> + err = reset_control_assert(priv->rst);
> + mdelay(10);
> + err = reset_control_deassert(priv->rst);
> +
> + /* Disable some aspeed platform problematic HW arbitration */
> + if (of_device_is_compatible(np, "aspeed,ast2600-mac") ||
> + of_device_is_compatible(np, "aspeed,ast2700-mac"))
> iowrite32(FTGMAC100_TM_DEFAULT,
> priv->base + FTGMAC100_OFFSET_TM);
> }
