Hi Krzysztof,
On 02/11/2024 10:51, Krzysztof Kozlowski wrote:
> On Fri, Nov 01, 2024 at 10:06:10AM +0200, Andrei Stefanescu wrote:
>> + /* Order is MSCR regions first, then IMCR ones */
>> for (i = 0; i < mem_regions; i++) {
>> - base = devm_platform_get_and_ioremap_resource(pdev, i, &res);
>> - if (IS_ERR(base))
>> - return PTR_ERR(base);
>> -
>> - snprintf(ipctl->regions[i].name,
>> - sizeof(ipctl->regions[i].name), "map%u", i);
>> -
>> - s32_regmap_config.name = ipctl->regions[i].name;
>> - s32_regmap_config.max_register = resource_size(res) -
>> - s32_regmap_config.reg_stride;
>> -
>> - map = devm_regmap_init_mmio(&pdev->dev, base,
>> - &s32_regmap_config);
>> - if (IS_ERR(map)) {
>> - dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i);
>> - return PTR_ERR(map);
>> - }
>> -
>> - ipctl->regions[i].map = map;
>> + regmap_type = i < mem_regions / 2 ? SIUL2_MSCR : SIUL2_IMCR;
>> + j = i % mfd->num_siul2;
>> + ipctl->regions[i].map = mfd->siul2[j].regmaps[regmap_type];
>> ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i];
>
> This looks like breaking all the users. Nothing in commit msg about
> this: about rationale, impact or backwards compatibility.
>
> Nothing in changelog in cover letter explaining such sudden change in
> approach.
>
> Sorry, that's a NAK.
I will add a detailed explanation for the change in v6. I changed the existing
implementation because of feedback received in this series and in [0]. The SIUL2
module has the pinctrl&GPIO functionality tightly coupled, which required us to
carve out the registers between GPIO & pinctrl and it resulted in a long and detailed
list.
Also, in the future, we will also have some nvmem cells exported which are part
of SIUL2.
Best regards,
Andrei
[0] - https://lore.kernel.org/linux-gpio/20241002135920.3647322-1-andrei.stefanescu@xxxxxxxxxxx/
>
> Best regards,
> Krzysztof
>
