Add clock indexes for EyeQ6H west OLB. Internal hierarchy is: PLL_PER └── PER_OCC └── PER_UART Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> --- include/dt-bindings/clock/mobileye,eyeq5-clk.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/mobileye,eyeq5-clk.h b/include/dt-bindings/clock/mobileye,eyeq5-clk.h index 2356bc52646df9cfeb93df8120eb8f0bf80d97e9..8efdf0feae8e43e7b84ff9ca12b8b90c3116240d 100644 --- a/include/dt-bindings/clock/mobileye,eyeq5-clk.h +++ b/include/dt-bindings/clock/mobileye,eyeq5-clk.h @@ -37,6 +37,10 @@ #define EQ6HC_CENTRAL_PLL_CPU 0 #define EQ6HC_CENTRAL_CPU_OCC 1 +#define EQ6HC_WEST_PLL_PER 0 +#define EQ6HC_WEST_PER_OCC 1 +#define EQ6HC_WEST_PER_UART 2 + #define EQ6HC_SOUTH_PLL_VDI 0 #define EQ6HC_SOUTH_PLL_PCIE 1 #define EQ6HC_SOUTH_PLL_PER 2 -- 2.47.0