Hi Tudor, On Wed, 30 Oct 2024 at 11:25, Tudor Ambarus <tudor.ambarus@xxxxxxxxxx> wrote: > > > > On 10/25/24 2:14 PM, Peter Griffin wrote: > > Previously just AXIDMA_RWDATA_BURST_LEN[3:0] field was set to 8. > > where was this set? It is set to 0xf in exynos_ufs_post_link() function, see the following line hci_writel(ufs, 0xf, HCI_AXIDMA_RWDATA_BURST_LEN); As all other SoCs expect the current value, I've left that assignment in the common function, and we update it in the gs101_ufs_post_link() specific hook. > > > > > To enable WLU transaction additionally we need to set Write Line > > Unique enable [31], Write Line Unique Burst Length [30:27] and > > AXIDMA_RWDATA_BURST_LEN[3:0]. > > > > To support WLU transaction, both burth length fields need to be 0x3. > > > > typo, s/burth/burst Will fix. Peter
