On Sun, Oct 27, 2024 at 03:24:03AM +0200, Dmitry Baryshkov wrote:
> Add DT file for the Qualcomm SAR2130P platform.
>
> Co-developed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sar2130p.dtsi | 3091 ++++++++++++++++++++++++++++++++
> 1 file changed, 3091 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..a8edbb9e6591265644476623aec36be9147ed7a0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi
> +
> + uart7: uart@a84000 {
And this should be serial@, will be fixed in the next iteration.
> + compatible = "qcom,geni-uart";
> + reg = <0x0 0x00a84000 0x0 0x4000>;
> + clock-names = "se";
> + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
> + pinctrl-0 = <&qup_uart7_default>;
> + pinctrl-names = "default";
> + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
> + &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
> + <&system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS
> + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "qup-core", "qup-config";
> + status = "disabled";
> + };
> +
--
With best wishes
Dmitry
