Add support to the QCS8300 Video clock controller by extending
the SA8775P Video clock controller, which is mostly identical
but QCS8300 has minor difference.
Signed-off-by: Imran Shaik <quic_imrashai@xxxxxxxxxxx>
---
drivers/clk/qcom/videocc-sa8775p.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/qcom/videocc-sa8775p.c b/drivers/clk/qcom/videocc-sa8775p.c
index bf5de411fd5d..db492984fd7d 100644
--- a/drivers/clk/qcom/videocc-sa8775p.c
+++ b/drivers/clk/qcom/videocc-sa8775p.c
@@ -523,6 +523,7 @@ static struct qcom_cc_desc video_cc_sa8775p_desc = {
};
static const struct of_device_id video_cc_sa8775p_match_table[] = {
+ { .compatible = "qcom,qcs8300-videocc" },
{ .compatible = "qcom,sa8775p-videocc" },
{ }
};
@@ -550,6 +551,13 @@ static int video_cc_sa8775p_probe(struct platform_device *pdev)
clk_lucid_evo_pll_configure(&video_pll0, regmap, &video_pll0_config);
clk_lucid_evo_pll_configure(&video_pll1, regmap, &video_pll1_config);
+ /*
+ * Set mvs0c clock divider to div-3 to make the mvs0 and
+ * mvs0c clocks to run at the same frequency on QCS8300
+ */
+ if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcs8300-videocc"))
+ regmap_write(regmap, video_cc_mvs0c_div2_div_clk_src.reg, 2);
+
/* Keep some clocks always enabled */
qcom_branch_set_clk_en(regmap, 0x80ec); /* VIDEO_CC_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0x8144); /* VIDEO_CC_SLEEP_CLK */
--
2.25.1
