On 22/10/2024 23:08, Rob Herring wrote:
On Tue, Oct 22, 2024 at 10:02:05PM +0200, Benjamin Larsson wrote:
On 21/10/2024 21:00, Rob Herring wrote:
+ airoha,sipo-clock-divisor:
+ description: Declare Shift Register chip clock divisor (clock source is
+ from SoC APB Clock)
Where is the clock source defined?
By measurement the clock was found to be 125MHz.
What I mean is the clock input should be a 'clocks' property. Assuming
this is a clock input to the PWM which I'm not so sure about given the
other replies.
Rob
Hi, the SoC has 8 pwm generators. The pwm signals from the generators
can be muxed out almost everywhere. One place is on the pins of a shift
register chip. This setting configures the clock signal this shift
register chip is fed by the SoC.
The main scenario for the shift register is to drive leds. For that the
default value is perfectly fine and the property can be dropped.
MvH
Benjamin Larsson
