On Tue, Oct 22, 2024 at 04:08:58PM -0500, Rob Herring wrote: > On Tue, Oct 22, 2024 at 10:02:05PM +0200, Benjamin Larsson wrote: > > On 21/10/2024 21:00, Rob Herring wrote: > > > > + airoha,sipo-clock-divisor: > > > > + description: Declare Shift Register chip clock divisor (clock source is > > > > + from SoC APB Clock) > > > Where is the clock source defined? > > > > > By measurement the clock was found to be 125MHz. > > What I mean is the clock input should be a 'clocks' property. Assuming > this is a clock input to the PWM which I'm not so sure about given the > other replies. > Yep it's not, we are just dropping this property and hardcoding it to a sensible value in the driver. Sorry for the confusion and thanks for the clarification. -- Ansuel
