On 21.10.2024 10:32, Krzysztof Kozlowski wrote:
> On Sat, Oct 19, 2024 at 11:47:29AM +0300, Claudiu wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>>
>> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC,
>> the tamper detector and a small general usage memory of 128B.
>>
>> The VBATTB controller controls the clock for the RTC on the Renesas
>> RZ/G3S. The HW block diagram for the clock logic is as follows:
>>
>> +----------+ XC `\
>> RTXIN --->| |----->| \ +----+ VBATTCLK
>> | 32K clock| | |----->|gate|----------->
>> | osc | XBYP | | +----+
>
> Messed indent. Switch to spaces.
>
>> RTXOUT --->| |----->| /
>> +----------+ ,/
>>
>> One could connect as input to this HW block either a crystal or
>> an external clock device.
>>
>> After discussions w/ Stephen Boyd the clock tree associated with this
>> hardware block was exported in Linux as:
>>
>> input-xtal
>> xbyp
>> xc
>> mux
>> vbattclk
>>
>> where:
>> - input-xtal is the input clock (connected to RTXIN, RTXOUT pins)
>> - xc, xbyp are mux inputs
>> - mux is the internal mux
>> - vbattclk is the gate clock that feeds in the end the RTC
>>
>> to allow selecting the input of the MUX though assigned-clock DT
>> properties, using the already existing clock drivers and avoid adding
>> other DT properties.
>>
>> This allows select the input of the mux based on the type of the
>> connected input clock:
>> - if the 32768 crystal is connected as input for the VBATTB,
>> the input of the mux should be xc
>> - if an external clock device is connected as input for the VBATTB the
>> input of the mux should be xbyp
>
>> + clocks:
>> + items:
>> + - description: VBATTB module clock
>> + - description: RTC input clock (crystal or external clock device)
>> +
>> + clock-names:
>> + items:
>> + - const: bclk
>> + - const: rtx
>> +
>> + '#clock-cells':
>> + const: 1
>> +
>> + power-domains:
>> + maxItems: 1
>> +
>> + resets:
>> + items:
>> + - description: VBATTB module reset
>> +
>> + quartz-load-femtofarads:
>> + description: load capacitance of the on board crystal
>> + enum: [ 4000, 7000, 9000, 12500 ]
>
> It's not required, so:
> default: ?
OK, I'll add the default.
>
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - clocks
>> + - clock-names
>> + - '#clock-cells'
>> + - power-domains
>> + - resets
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/r9a08g045-cpg.h>
>> + #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> + clock-controller@1005c000 {
>> + compatible = "renesas,r9a08g045-vbattb";
>> + reg = <0x1005c000 0x1000>;
>> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
>> + clock-names = "bclk", "rtx";
>> + assigned-clocks = <&vbattb VBATTB_MUX>;
>> + assigned-clock-parents = <&vbattb VBATTB_XC>;
>
> Why are you configuring internal clocks to internal parents? That's part
> internal to this device, not DTS... or at least some explanation would
> be useful.
>
> Best regards,
> Krzysztof
>
