Hi Damien,
On Wed, 16 Oct 2024 at 13:38, Damien Le Moal <dlemoal@xxxxxxxxxx> wrote:
>
> On 10/16/24 4:22 PM, Anand Moon wrote:
> > Hi Damien,
> >
> > On Wed, 16 Oct 2024 at 11:45, Damien Le Moal <dlemoal@xxxxxxxxxx> wrote:
> >>
> >> On 10/16/24 2:32 PM, Anand Moon wrote:
> >>> Hi Damien,
> >>>
> >>> On Fri, 11 Oct 2024 at 17:55, Damien Le Moal <dlemoal@xxxxxxxxxx> wrote:
> >>>>
> >>>> This patch series fix the PCI address mapping handling of the Rockchip
> >>>> endpoint driver, refactor some of its code, improves link training and
> >>>> adds handling of the #PERST signal.
> >>>>
> >>>> This series is organized as follows:
> >>>> - Patch 1 fixes the rockchip ATU programming
> >>>> - Patch 2, 3 and 4 introduce small code improvments
> >>>> - Patch 5 implements the .get_mem_map() operation to make the RK3399
> >>>> endpoint controller driver fully functional with the new
> >>>> pci_epc_mem_map() function
> >>>> - Patch 6, 7, 8 and 9 refactor the driver code to make it more readable
> >>>> - Patch 10 introduces the .stop() endpoint controller operation to
> >>>> correctly disable the endpopint controller after use
> >>>> - Patch 11 improves link training
> >>>> - Patch 12 implements handling of the #PERST signal
> >>>>
> >>>> This patch series depends on the PCI endpoint core patches from the
> >>>> V5 series "Improve PCI memory mapping API". The patches were tested
> >>>> using a Pine Rockpro64 board used as an endpoint with the test endpoint
> >>>> function driver and a prototype nvme endpoint function driver.
> >>>
> >>> Can we test this feature on Radxa Rock PI 4b hardware with an external
> >>> nvme card?
> >>
> >> This patch series is to fix the PCI controller operation in endpoint (EP) mode.
> >> If you only want to use an NVMe device connected to the board M.2 M-Key slot,
> >> these patches are not needed. If that board PCI controller does not work as a
> >> PCI host (RC mode), then these patches will not help.
> >>
> >
> > Thanks for your inputs, I don't think my board supports this feature.
>
> The Rock 4B board uses a RK3399 SoC. So the PCIe port should work as long as
> you have the right device tree for the board. The mainline kernel currently has
> this DT:
>
> rk3399-rock-pi-4b.dts
>
> Which uses
>
> rk3399-rock-pi-4.dtsi
>
> which has:
>
> &pcie0 {
> ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
> num-lanes = <4>;
> pinctrl-0 = <&pcie_clkreqnb_cpm>;
> pinctrl-names = "default";
> vpcie0v9-supply = <&vcc_0v9>;
> vpcie1v8-supply = <&vcc_1v8>;
> vpcie3v3-supply = <&vcc3v3_pcie>;
> status = "okay";
> };
>
> So it looks to me like the PCIe port is supported just fine. FOr the PCIe port
> node definition look at rk3399.dtsi and rk3399-base.dtsi.
>
I have a question can new test external low power GPU with external cables
which supports PCI host (RC mode) with external power supply for GPU card.
Which mode is suitable for the PCIe endpoint controller or PCIe host controller?
> --
> Damien Le Moal
> Western Digital Research
Thanks
-Anand
