On Sun, 06 Oct 2024 19:47:56 +0300, Dmitry Baryshkov wrote:
> For historical reasons on SM8450 the second PCIe host (pcie1) also keeps
> a reference to the PIPE clock coming from the PHY. Commit e76862840660
> ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") has
> updated the PHY to use #clock-cells = <1>, making just <&pcie1_phy>
> clock specification invalid. Update corresponding clock entry in the
> PCIe1 host node.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sm8450 fix PIPE clock specification for pcie1
commit: 5d3d966400d0a094359009147d742b3926a2ea53
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
