On Mon, Sep 02, 2024 at 06:01:35PM +0300, Abel Vesa wrote:
> The Qualcomm Snapdragon X Elite CRD board has 3 USB Type-C ports,
> all of them supporting external DP altmode. Between each QMP
> combo PHY and the corresponding Type-C port, sits one Parade PS8830
> retimer which handles both orientation and SBU muxing. Add nodes for
> each retimer, fix the graphs between connectors and the PHYs accordingly,
> add the voltage regulators needed by each retimer and then enable all
> 3 remaining DPUs.
>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> + vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR0_1P15";
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1150000>;
> +
> + gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
When reviewing the schematics yesterday, I noticed that this is wrong
and that this enable GPIO comes from pmc8380_5_gpios.
Fortunately the above gpio is unused, but please double check the other
as well (I think the rest are correct).
You need to fix the pincfg as well.
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr0_1p15_reg_en>;
Please rename the enable pins according to the schematics too (e.g.
"usb0_pwr_1p15_en").
> + pinctrl-names = "default";
> + };
> +&i2c1 {
> + clock-frequency = <400000>;
> +
> + status = "okay";
> +
> + typec-mux@8 {
> + compatible = "parade,ps8830";
> + reg = <0x08>;
> +
> + clocks = <&rpmhcc RPMH_RF_CLK5>;
> + clock-names = "xo";
> +
> + vdd15-supply = <&vreg_rtmr2_1p15>;
> + vdd18-supply = <&vreg_rtmr2_1p8>;
> + vdd33-supply = <&vreg_rtmr2_3p3>;
> +
> + reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>;
As I mentioned elsewhere, the reset lines are active low.
> +&pm8550_gpios {
> + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {
> + pins = "gpio11";
> + function = "func1";
And this should be "normal" for gpio function, right? Same below.
> + input-disable;
> + output-enable;
And I don't think you need to provide these.
> + };
> +};
Johan
