On Thu, 10 Oct 2024 12:35:03 +0530, Md Sadre Alam wrote: > Document the QPIC-SPI-NAND flash controller present in the IPQ SoCs. > It can work both in serial and parallel mode and supports typical > SPI-NAND page cache operations. > > Signed-off-by: Md Sadre Alam <quic_mdalam@xxxxxxxxxxx> > --- > > Change in [v11] > > * Dropped Reviewed-by tag > * Added Soc based compitable "qcom,ipq9574-snand" > > Change in [v10] > > * No change > > Change in [v9] > > * No change > > Change in [v8] > > * No change > > Change in [v7] > > * No change > > Change in [v6] > > * No change > > Change in [v5] > > * No change > > Change in [v4] > > * Fix spelling mistake in HW description > > * Added commit message > > * Removed '|' from description > > * Removed minItems in clock > > * Added blank line > > * Removed co-developed by > > Change in [v3] > > * Updated commit message, removed "dt-bindings" from commit > message > > * Updated compatible name as file name > > * Added hardware description > > * Documented clock-name > > * Moved dma-names property to top > > * Droped unused label "qpic_nand" > > * Fixed indentation in example dt node > > Change in [v2] > > * Added initial support for dt-bindings > > Change in [v1] > > * This patch was not included in [v1] > > .../bindings/spi/qcom,spi-qpic-snand.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
