Hi, Geert, On 10.10.2024 12:29, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Fri, Aug 30, 2024 at 3:02 PM Claudiu <claudiu.beznea@xxxxxxxxx> wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> >> >> Document the RTC IP (RTCA-3) available on the Renesas RZ/G3S SoC. >> The RTC IP available on Renesas RZ/V2H is almost identical with the >> one found on Renesas RZ/G3S (it misses the time capture functionality >> which is not yet implemented on proposed driver). For this, added also a >> generic compatible that will be used at the moment as fallback for both >> RZ/G3S and RZ/V2H. >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> >> --- >> >> Changes in v3: >> - added RTC bus clock, reset and power-domain; it has been detected >> by reverse engineering that RTC and VBATTB clock, reset and power >> domain are shared; HW manual doesn't mention it >> - updated example with these and with assigned-clock properties >> needed to configure the VBATTCLK MUX with proper parent >> - updated example section with dt-bindings/clock/r9a08g045-cpg.h >> and dt-bindings/clock/r9a08g045-vbattb.h includes >> - for all these, dropped Conor's Rb tag > > Thanks for the update! > > Sorry for chiming in late, but this RTCA-3 block seems to be a > derivative of the RTC blocks found on older SuperH SoCs, and on RZ/A1 > and RZ/A2 ARM SoCs. Differences are found in (lack of) > 100/1000-year-count parts and the Year Alarm Enable Register, and in > some control register bits. At a 1st look it seems so, yes. I was inclined at the beginning to just use the rtc-sh but the RZ/G3S HW manual mentions a lot of restrictions that need to be followed when configuring the IP. Because of these restrictions I chose to have a different driver. Otherwise the rtc-sh would have become way too complication as far as I can tell.
