Hi Claudiu,
On Thu, Aug 22, 2024 at 5:28 PM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> Document the Renesas RZ/G3S USB PHY Control IP. This is similar with the
> one found on the RZ/G2L SoC the exception being that the SYSC USB specific
> signal need to be configured before accessing the USB area. This is
> done though a reset signal.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
> +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
> @@ -15,12 +15,15 @@ description:
>
> properties:
> compatible:
> - items:
> - - enum:
> - - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
> - - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
> - - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
> - - const: renesas,rzg2l-usbphy-ctrl
> + oneOf:
> + - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
> +
Unneeded blank line.
> + - items:
> + - enum:
> + - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
> + - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
> + - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
> + - const: renesas,rzg2l-usbphy-ctrl
Nit: usually these are sorted by part number, so the RZ/G3S section
should be last.
For the contents:
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
