On 10/7/24 3:27 PM, Gatien Chevallier wrote:
Implement the support for STM32MP25x platforms. On this platform, a
security clock is shared between some hardware blocks. For the RNG,
it is the RNG kernel clock. Therefore, the gate is no more shared
between the RNG bus and kernel clocks as on STM32MP1x platforms and
the bus clock has to be managed on its own.
Signed-off-by: Gatien Chevallier <gatien.chevallier@xxxxxxxxxxx>
A bit of a higher-level design question -- can you use
drivers/clk/clk-bulk.c clk_bulk_*() to handle all these disparate count
of clock easily ?
