On 9/25/2024 7:52 PM, Krzysztof Kozlowski wrote:
On 24/09/2024 07:09, Shivnandan Kumar wrote:
Add the CPUCP mailbox node required for communication with CPUCP.
Signed-off-by: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3d8410683402..4b9b26a75c62 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -4009,6 +4009,14 @@ gem_noc: interconnect@9100000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ cpucp_mbox: mailbox@17430000 {
Are you sure you placed it in correct location (the order is by unit
address, see DTS coding style).
I will correct it in next series.
+ compatible = "qcom,sc7280-cpucp-mbox";
+ reg = <0 0x18590000 0 0x2000>,
+ <0 0x17C00000 0 0x10>;
Lowercase hex... we just fixed it everywhere and you introduce again
same issues.
ACK
Best regards,
Krzysztof
