After a change enabling display clock controller for all Qualcomm SM8650 powered board by default there is no more need to set a status property of dispcc on SM8650-QRD board. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index 8ca0d28eba9b..c5e8c3c2df91 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -741,10 +741,6 @@ vreg_l7n_3p3: ldo7 { }; }; -&dispcc { - status = "okay"; -}; - &gpi_dma1 { status = "okay"; }; -- 2.45.2