Hi, On 23/09/2024 00:07, Conor Dooley wrote: > On Sun, Sep 22, 2024 at 11:04:22PM +0200, Krzysztof Kozlowski wrote: >> On Sat, Sep 21, 2024 at 10:58:46PM +0100, Conor Dooley wrote: >>> On Fri, Sep 20, 2024 at 03:40:31PM +0200, Krzysztof Kozlowski wrote: >>>> On 20/09/2024 15:33, Andrei Stefanescu wrote: > >>>>>>> +properties: >>>>>>> + compatible: >>>>>>> + items: >>>>>>> + - const: nxp,s32g2-siul2-gpio >>>>>> >>>>>> Commit message and binding description say s32g2 and s32g3, but there's >>>>>> only a compatible here for g2. >>>>> >>>>> Yes, the SIUL2 GPIO hardware is the same for both S32G2 and S32G3 SoCs. I plan >>>>> to reuse the same compatible when I add the SIUL2 GPIO device tree node for >>>>> the S32G3 boards. Would that be ok? >>>> >>>> There are only few exceptions where re-using compatible is allowed. Was >>>> S32G on them? Please consult existing practice/maintainers and past reviews. I will add another compatible: "nxp,s32g3-siul2-gpio" for the S32G3 SoC. We currently also have the SIUL2 pinctrl driver in upstream with only one compatible: "nxp,s32g2-siul2-pinctrl". Should I also send a separate patch to add an S32G3 compatible to it? >> >> Just in case this was not clear - comment "please consult existing..." >> was towards Andrei, not you Conor. > > Oh I know, I was just passing through and figured I may as well leave a > comment repeating what I said on the other devices :) > >>> Pretty sure I had a similar conversation about another peripheral on >>> these devices, and it was established that these are not different fusings >>> etc, but rather are independent SoCs that reuse an IP core. Given that, >>> I'd expect to see a fallback compatible used here, as is the norm. >> >> Yep. >> >> Best regards, >> Krzysztof >> Best regards, Andrei
