On Thu, Sep 19, 2024 at 5:03 PM Frank Li <Frank.Li@xxxxxxx> wrote:
>
> The PCI bus device tree supports 'ranges' properties that indicate
> how to convert PCI addresses to CPU addresses. Many PCI controllers
> are dual-role controllers, supporting both Root Complex (RC) and
> Endpoint (EP) modes. The EP side also needs similar information for
> proper address translation.
>
> This commit introduces several changes to add 'ranges' support for
> PCI endpoint devices:
>
> 1. **Modify of_address.c**: Add support for the new `device_type`
> "pci-ep", enabling it to parse 'ranges' using the same functions
> as for PCI devices.
>
> 2. **Update DesignWare PCIe EP driver**: Enhance the driver to
> support 'ranges' when 'addr_space' is missing, maintaining
> compatibility with existing drivers.
>
> 3. **Update binding documentation**: Modify the device tree bindings
> to include 'ranges' support and make 'addr_space' an optional
> entry in 'reg-names'.
>
> 4. **Add i.MX8QXP EP support**: Incorporate support for the
> i.MX8QXP PCIe EP in the driver.
>
> i.MX8QXP PCIe dts is upstreaming. Below is pcie-ep part.
>
> pcieb_ep: pcie-ep@5f010000 {
> compatible = "fsl,imx8q-pcie-ep";
> reg = <0x5f010000 0x00010000>;
> reg-names = "dbi";
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci-ep";
> ranges = <0x82000000 0 0x80000000 0x70000000 0 0x10000000>;
How does a PCI endpoint set PCI addresses? Those get assigned by the
PCI host system. They can't be static in DT.
If you need the PCI address, just read your BAR registers.
In general, why do you need this when none of the other PCI endpoint
drivers have needed this?
Rob
