On Thu, 2024-09-19 at 11:19 +0200, Angelo Dureghello wrote: > From: Angelo Dureghello <adureghello@xxxxxxxxxxxx> > > Fix ADI_DAC_R1_MODE of AXI_DAC_REG_CNTRL_2. > > Both generic DAC and ad3552r DAC IPs docs are reporting > bit 5 for it. > > https://wiki.analog.com/resources/fpga/docs/axi_dac_ip > https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html > > Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx> > --- Ouch... Missing Fixes tag. With that, Reviewed-by: Nuno Sa <nuno.sa@xxxxxxxxxx> > drivers/iio/dac/adi-axi-dac.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iio/dac/adi-axi-dac.c b/drivers/iio/dac/adi-axi-dac.c > index 0cb00f3bec04..b8b4171b8043 100644 > --- a/drivers/iio/dac/adi-axi-dac.c > +++ b/drivers/iio/dac/adi-axi-dac.c > @@ -46,7 +46,7 @@ > #define AXI_DAC_REG_CNTRL_1 0x0044 > #define AXI_DAC_SYNC BIT(0) > #define AXI_DAC_REG_CNTRL_2 0x0048 > -#define ADI_DAC_R1_MODE BIT(4) > +#define ADI_DAC_R1_MODE BIT(5) > #define AXI_DAC_DRP_STATUS 0x0074 > #define AXI_DAC_DRP_LOCKED BIT(17) > /* DAC Channel controls */ >
