On Tue, Sep 17, 2024 at 03:22:52PM +0530, Dhruva Gole wrote:
> It seems like we missed migrating the complete information from the old
> DT binding where we had described what the opp-supported-hw is supposed
> to describe. Hence, bring back the description from the previous binding
> to the current one along with a bit more context on what the values are
> supposed to be.
>
> Fixes: e576a9a8603f ("dt-bindings: cpufreq: Convert ti-cpufreq to json schema")
> Signed-off-by: Dhruva Gole <d-gole@xxxxxx>
> ---
>
> Changes in v3:
> - Use the items: and then provide description for both required items.
> This tries to address Rob's comments on previous revision.
> - I've not use min/max Items as the 2 descriptions items implicitly
> imply that number of bitfields needed are 2.
> - Link to v2: https://lore.kernel.org/all/20240905-b4-opp-dt-binding-fix-v2-1-1e3d2a06748d@xxxxxx/
>
> Changes in v2:
> - Drop the patch where I updated Maintainers since it's already picked
> by Viresh.
> - Add more details of how to populate the property based on device
> documents like TRM/ datasheet.
> - Link to v1: https://lore.kernel.org/r/20240903-b4-opp-dt-binding-fix-v1-0-f7e186456d9f@xxxxxx
>
> ---
> .../opp/operating-points-v2-ti-cpu.yaml | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> index fd0c8d5c5f3e..700af89487d0 100644
> --- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> @@ -45,7 +45,22 @@ patternProperties:
> clock-latency-ns: true
> opp-hz: true
> opp-microvolt: true
> - opp-supported-hw: true
> + opp-supported-hw:
> + items:
> + - description: |
Don't need '|'. If you want multiple paragraphs, then put a blank line
in between them.
> + Which revision of the SoC the OPP is supported by.
> + This can be easily obtained from the datasheet of the
> + part being ordered/used. For eg. it will be 0x01 for SR1.0
> + - description : |
> + Which eFuse bits indicate this OPP is available.
> + The device datasheet has a table talking about Device Speed Grades.
> + If one were to sort this table and only retain the unique elements
> + of the MAXIMUM OPERATING FREQUENCY starting from the first row
> + which tells the lowest OPP, to the highest. The corresponding bits
> + need to be set based on N elements of speed grade the device supports.
> + So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY
> + in the table, then BIT(0), (1) and (2) will be set, which means
> + the value shall be 0x7.
> opp-suspend: true
> turbo-mode: true
>
> --
> 2.34.1
>
