Hi Thippeswamy, kernel test robot noticed the following build errors: [auto build test ERROR on pci/next] [also build test ERROR on pci/for-linus mani-mhi/mhi-next robh/for-next linus/master v6.11-rc6 next-20240906] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Thippeswamy-Havalige/dt-bindings-PCI-xilinx-cpm-Add-compatible-string-for-CPM5-controller-1/20240906-173446 base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next patch link: https://lore.kernel.org/r/20240906093148.830452-3-thippesw%40amd.com patch subject: [PATCH 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller-1 config: alpha-randconfig-r051-20240907 (https://download.01.org/0day-ci/archive/20240907/202409071415.6WivnBm0-lkp@xxxxxxxxx/config) compiler: alpha-linux-gcc (GCC) 13.3.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240907/202409071415.6WivnBm0-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202409071415.6WivnBm0-lkp@xxxxxxxxx/ All errors (new ones prefixed by >>): drivers/pci/controller/pcie-xilinx-cpm.c: In function 'xilinx_cpm_pcie_event_flow': >> drivers/pci/controller/pcie-xilinx-cpm.c:292:44: error: 'CPM5_HOST1' undeclared (first use in this function) 292 | else if (port->variant->version == CPM5_HOST1) { | ^~~~~~~~~~ drivers/pci/controller/pcie-xilinx-cpm.c:292:44: note: each undeclared identifier is reported only once for each function it appears in drivers/pci/controller/pcie-xilinx-cpm.c: In function 'xilinx_cpm_pcie_init_port': drivers/pci/controller/pcie-xilinx-cpm.c:504:44: error: 'CPM5_HOST1' undeclared (first use in this function) 504 | else if (port->variant->version == CPM5_HOST1) { | ^~~~~~~~~~ drivers/pci/controller/pcie-xilinx-cpm.c: At top level: >> drivers/pci/controller/pcie-xilinx-cpm.c:635:40: error: redefinition of 'cpm5_host' 635 | static const struct xilinx_cpm_variant cpm5_host = { | ^~~~~~~~~ drivers/pci/controller/pcie-xilinx-cpm.c:631:40: note: previous definition of 'cpm5_host' with type 'const struct xilinx_cpm_variant' 631 | static const struct xilinx_cpm_variant cpm5_host = { | ^~~~~~~~~ >> drivers/pci/controller/pcie-xilinx-cpm.c:636:20: error: 'CPM5_HOST1' undeclared here (not in a function) 636 | .version = CPM5_HOST1, | ^~~~~~~~~~ >> drivers/pci/controller/pcie-xilinx-cpm.c:650:26: error: 'cpm5_host1' undeclared here (not in a function); did you mean 'cpm5_host'? 650 | .data = &cpm5_host1, | ^~~~~~~~~~ | cpm5_host vim +/CPM5_HOST1 +292 drivers/pci/controller/pcie-xilinx-cpm.c 270 271 static void xilinx_cpm_pcie_event_flow(struct irq_desc *desc) 272 { 273 struct xilinx_cpm_pcie *port = irq_desc_get_handler_data(desc); 274 struct irq_chip *chip = irq_desc_get_chip(desc); 275 unsigned long val; 276 int i; 277 278 chained_irq_enter(chip, desc); 279 val = pcie_read(port, XILINX_CPM_PCIE_REG_IDR); 280 val &= pcie_read(port, XILINX_CPM_PCIE_REG_IMR); 281 for_each_set_bit(i, &val, 32) 282 generic_handle_domain_irq(port->cpm_domain, i); 283 pcie_write(port, val, XILINX_CPM_PCIE_REG_IDR); 284 285 if (port->variant->version == CPM5) { 286 val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE0_IR_STATUS); 287 if (val) 288 writel_relaxed(val, port->cpm_base + 289 XILINX_CPM_PCIE0_IR_STATUS); 290 } 291 > 292 else if (port->variant->version == CPM5_HOST1) { 293 val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE1_IR_STATUS); 294 if (val) 295 writel_relaxed(val, port->cpm_base + 296 XILINX_CPM_PCIE1_IR_STATUS); 297 } 298 299 /* 300 * XILINX_CPM_PCIE_MISC_IR_STATUS register is mapped to 301 * CPM SLCR block. 302 */ 303 val = readl_relaxed(port->cpm_base + XILINX_CPM_PCIE_MISC_IR_STATUS); 304 if (val) 305 writel_relaxed(val, 306 port->cpm_base + XILINX_CPM_PCIE_MISC_IR_STATUS); 307 308 chained_irq_exit(chip, desc); 309 } 310 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
