From: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> Document the Qualcomm UNIPHY PCIe 28LP present in IPQ5018. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> --- [v3] Added reviewed-by tags .../phy/qcom,ipq5018-uniphy-pcie.yaml | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml new file mode 100644 index 000000000000..c04dd179eb8b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,ipq5018-uniphy-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm UNIPHY PCIe 28LP PHY controller for genx1, genx2 + +maintainers: + - Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> + - Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> + +properties: + compatible: + enum: + - qcom,ipq5018-uniphy-pcie-gen2x1 + - qcom,ipq5018-uniphy-pcie-gen2x2 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pipe + + resets: + maxItems: 2 + + reset-names: + items: + - const: phy + - const: common + + "#phy-cells": + const: 0 + + "#clock-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + - "#clock-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq5018.h> + #include <dt-bindings/reset/qcom,gcc-ipq5018.h> + + phy@86000 { + compatible = "qcom,ipq5018-uniphy-pcie-gen2x2"; + reg = <0x86000 0x1000>; + clocks = <&gcc GCC_PCIE0_PIPE_CLK>; + clock-names = "pipe"; + resets = <&gcc GCC_PCIE0_PHY_BCR>, + <&gcc GCC_PCIE0PHY_PHY_BCR>; + reset-names = "phy", "common"; + #phy-cells = <0>; + #clock-cells = <0>; + }; -- 2.34.1
