On 8/12/2024 10:46 AM, Florian Fainelli wrote:
[snip]
what about these (and other) header reads if reg-io-width is defined
as < 32 ?
Should not these accesses be size-wise too ? or I am missing smth ...
Good question, I suppose it depends whether 'reg-io-width' means that
this must be the strict access width we use, or if this is the minimum
access width supported. If the former, then yes, we do have to make a
whole lot of changes to support the only access width being supported,
if the latter, then we ought to be OK, because doing a 32-bit access
should drive more byte enables at the bus level, yet still return the
expected data.
A minimum or only supported access width of 64-bit would be quite
interesting, and not somewhat compatible with how SCMI is defined, so
maybe that one should not be supported at all, even if this is how
memcpy_{to,from}_io() decides to operate on parts of the memory that are
8bytes aligned.
I am inclined to dropping support for doing 1 and 2 byte accesses, and
support only 4-byte accesses, since the existing SCMI code makes use of
io{read,write}32 in many places, unless you feel strongly about it.
1 and 2 byte accesses only do not quite make sense for a SRAM IMHO, that
is, if you can support 1 byte, then you must support 4 byte, too.
--
Florian
