Le 09/08/2024 à 16:40, Ceclan, Dumitru a écrit :
On 09/08/2024 17:30, Christophe JAILLET wrote:
Le 09/08/2024 à 12:33, Dumitru Ceclan via B4 Relay a écrit :
From: Dumitru Ceclan <dumitru.ceclan-OyLXuOCK7orQT0dZR+AlfA-XMD5yJDbdMReXY1tMh2IBg@xxxxxxxxxxxxxxxx>
This commit adds support for the AD4113 ADC.
The AD4113 is a low power, low noise, 16-bit, Σ-Δ analog-to-digital
converter (ADC) that integrates an analog front end (AFE) for four
fully differential or eight single-ended inputs.
Signed-off-by: Dumitru Ceclan <dumitru.ceclan-OyLXuOCK7orQT0dZR+AlfA-XMD5yJDbdMReXY1tMh2IBg@xxxxxxxxxxxxxxxx>
---
drivers/iio/adc/ad7173.c | 36 +++++++++++++++++++++++++++++++++++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c
index a854f2d30174..3ac09d326472 100644
--- a/drivers/iio/adc/ad7173.c
+++ b/drivers/iio/adc/ad7173.c
@@ -3,7 +3,7 @@
* AD717x and AD411x family SPI ADC driver
*
* Supported devices:
- * AD4111/AD4112/AD4114/AD4115/AD4116
+ * AD4111/AD4112/AD4113/AD4114/AD4115/AD4116
* AD7172-2/AD7172-4/AD7173-8/AD7175-2
* AD7175-8/AD7176-2/AD7177-2
*
@@ -84,6 +84,7 @@
#define AD4111_ID AD7173_ID
#define AD4112_ID AD7173_ID
#define AD4114_ID AD7173_ID
+#define AD4113_ID 0x31D0
Nitpick: others are in lowercase --> 0x31d0
#define AD4116_ID 0x34d0
#define AD4115_ID 0x38d0
#define AD7175_8_ID 0x3cd0
Other than that, is there any reason to have this "random" order for these defines?
CJ
It's not random, it was requested to order these defines by the ID value:
https://lore.kernel.org/all/CAHp75VcjcgnLkQWim1AVnyeRGFwwKpaWSCvrmqdv41Lx87hMKw-JsoAwUIsXosN+BqQ9rBEUg@xxxxxxxxxxxxxxxx/
Ok,
I thought about it, but it is not sorted either. (a few lines above the
place you added the new #define):
#define AD7175_ID 0x0cd0
#define AD7176_ID 0x0c90
Maybe, it should be part of another patch to keep the logic by ID value?
CJ
