Hi Nishanth, > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > new file mode 100644 > > index 000000000000..2ea470d1206d > > --- /dev/null > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > @@ -0,0 +1,21 @@ > > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > > +/* > > + * Device Tree Source for J784S4 SoC Family Main Domain peripherals > > + * > > + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ > > + */ > > + > > +&cbass_main { > > + c71_3: dsp@67800000 { > > + compatible = "ti,j721s2-c71-dsp"; > > + reg = <0x00 0x67800000 0x00 0x00080000>, > > + <0x00 0x67e00000 0x00 0x0000c000>; > > + reg-names = "l2sram", "l1dram"; > > + ti,sci = <&sms>; > > + ti,sci-dev-id = <40>; > > + ti,sci-proc-ids = <0x33 0xff>; > > + resets = <&k3_reset 40 1>; > > + firmware-name = "j784s4-c71_3-fw"; > > + status = "disabled"; > > + }; > > +}; > > I am looking at https://www.ti.com/lit/ug/spruje3/spruje3.pdf (page 26), > Device Comparison: > > CPSW/Serdes, PCIE is also different? Was that missed? I had talked to Siddharth in the past regarding that and he had mentioned that no change would be required with the previous patchsets that I had shared, adding him to the thread Regards, Manorit
