Hello Krzysztof, On 22/07/2024 11:51, Krzysztof Kozlowski wrote: > On 22/07/2024 11:41, ysionneau@xxxxxxxxxxxxx wrote: >> From: Yann Sionneau <ysionneau@xxxxxxxxxxxxx> >> >> Add binding for Kalray kv3-1 core interrupt controller. >> >> Co-developed-by: Jules Maselbas <jmaselbas@xxxxxxxx> >> Signed-off-by: Jules Maselbas <jmaselbas@xxxxxxxx> >> Signed-off-by: Yann Sionneau <ysionneau@xxxxxxxxxxxxx> >> --- >> >> Notes: >> >> V2 -> V3: Fixed bindings to adhere to dt schema >> --- >> .../kalray,kv3-1-intc.yaml | 54 +++++++++++++++++++ >> 1 file changed, 54 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-intc.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-intc.yaml >> new file mode 100644 >> index 0000000000000..9c8bb2c8c49dd >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-intc.yaml >> @@ -0,0 +1,54 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/kalray,kv3-1-intc.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Kalray kv3-1 Core Interrupt Controller >> + >> +maintainers: >> + - Jonathan Borne <jborne@xxxxxxxxxxxxx> >> + - Julian Vetter <jvetter@xxxxxxxxxxxxx> >> + - Yann Sionneau <ysionneau@xxxxxxxxxxxxx> >> + >> +description: | >> + The Kalray Core Interrupt Controller is tightly integrated in each kv3 core >> + present in the Coolidge SoC. >> + >> + It provides the following features: >> + - 32 independent interrupt sources >> + - 2-bit configurable priority level >> + - 2-bit configurable ownership level >> + >> +properties: >> + compatible: >> + const: kalray,kv3-1-intc > What is the SoC name/model? You use "Kalray Core" and "Coolidge" and > "kv3-1". The SoC name is Coolidge , it contains "Kalray cores". Kalray being the name of the company. The exact core name is kv3-1. The core is part of the kvx family: next core generation will most likely be called kv4 or kv4-1. The question whether to use "coolidge" (soc name) or "kv3-1" (cpu core name) for our IPs compatible is indeed a good one, we talked about it internally at Kalray. We ended up using "kv3-1" at the beginning of the compatible when the hw IP is very closed/tightly integrated into the CPU core. We ended up using "coolidge" when the hw IP is just some general IP inside the SoC (like the IOMMU, the dma_noc). The "intc" or "core intc", is very tightly integrated into the cpu core. The "core intc" is configured directly using core registers named SFR (System Function Registers) using special SFR handling instructions. It is not memory mapped. So we ended up using "kv3-1" in the compatible. Is this OK? > >> + >> + "#interrupt-cells": >> + const: 1 >> + description: >> + The IRQ number. >> + >> + "#address-cells": >> + const: 0 >> + >> + interrupt-controller: true >> + >> +additionalProperties: false > Please put it after "required:" block. See example-schema. This applies > everywhere. Oops, ok, I will do this. > >> + >> +required: >> + - compatible >> + - "#interrupt-cells" >> + - "#address-cells" >> + - interrupt-controller >> + >> +examples: >> + - | >> + intc: interrupt-controller { > No resources? How does it talk with the hardware? CPU configures the core intc using special instructions to access SFR (System Function Registers). > >> + compatible = "kalray,kv3-1-intc"; >> + #interrupt-cells = <1>; >> + #address-cells = <0>; >> + interrupt-controller; >> + }; >> + >> +... Regards, -- Yann
