On Thu, Jul 25, 2024 at 01:15:59PM +0100, pierre-henry.moussay@xxxxxxxxxxxxx wrote: > From: Pierre-Henry Moussay <pierre-henry.moussay@xxxxxxxxxxxxx> > > PIC64GX SoC has clock compatibles with the MPFS IP These commit messages don't really make sense. It should read something like "The pic64gx SoC has has Clock Conditioning Circuitry compatible with that on PolarFire SoC" or something along those lines. > > Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@xxxxxxxxxxxxx> > --- > .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > index f1770360798f..9a6b50527c42 100644 > --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > @@ -17,7 +17,11 @@ description: | > > properties: > compatible: > - const: microchip,mpfs-ccc > + oneOf: > + - items: > + - const: microchip,pic64gx-ccc > + - const: microchip,mpfs-ccc > + - const: microchip,mpfs-ccc > > reg: > items: > -- > 2.30.2 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-riscv
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