On Mon, Jul 15, 2024 at 02:04:54PM +0200, AngeloGioacchino Del Regno wrote:
[..]
> Besides, I also noticed that the CLK_APMIXED_PLL_SSUSB26M is missing from u2port1
> and the reason why it works is because other u3phy0 should be enabling that before
> u3phy1 inits and/or before the USB controller using U3P1 tries to initialize, so
> while you're at it ... if you can please also add that to the u3p1, I appreciate.
>
> u2port1: usb-phy@0 {
> reg = <0x0 0x700>;
> clocks = <&apmixedsys CLK_APMIXED_PLL_SSUSB26M>,
> <&topckgen CLK_TOP_SSUSB_PHY_P1_REF>;
> clock-names = "ref", "da_ref";
> #phy-cells = <1>;
> };
I'm not familiar with the clock topology on MT8195, but I noticed the
CLK_APMIXED_PLL_SSUSB26M clock is currently only present in the USB3 phy nodes:
u3port1 and u3port0. You're suggesting to add it to a USB2 phy node here. Is it
needed by all USB2 phy nodes (u2port0, u2port1, u2port2, u2port3) then?
Thanks,
Nícolas
