On Sat, Mar 7, 2015 at 1:46 AM, <tthayer@xxxxxxxxxxxxxxxxxxxxx> wrote:
> From: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>
>
> Instead of clearing the RxU, RxO, and TxO IRQs individually with
> 3 register reads, a single read of the ICR register will do the
> same thing.
>
> Signed-off-by: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxx>
Rather Suggested-by: …
Otherwise,
Acked-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> ---
> drivers/spi/spi-dw.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
> index 950bc50..c5fa2be 100644
> --- a/drivers/spi/spi-dw.c
> +++ b/drivers/spi/spi-dw.c
> @@ -258,9 +258,7 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
>
> /* Error handling */
> if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
> - dw_readw(dws, DW_SPI_TXOICR);
> - dw_readw(dws, DW_SPI_RXOICR);
> - dw_readw(dws, DW_SPI_RXUICR);
> + dw_readw(dws, DW_SPI_ICR);
> int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
> return IRQ_HANDLED;
> }
> --
> 1.7.9.5
>
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--
With Best Regards,
Andy Shevchenko
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