From: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx> The Altera Arria10 SoC interconnect requires 32 bit write accesses to APB peripherals. The DesignWare SPI peripheral registers are on 32bit boundaries so this patch is minimal. Function pointers are used to select 32bit access or 16bit accesses Thor Thayer (3): spi: dw-spi: Single Register read to clear IRQs dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI spi: dw-spi: Pointers select 16b vs. 32b DesignWare access Documentation/devicetree/bindings/spi/spi-dw.txt | 1 + drivers/spi/spi-dw-mmio.c | 7 ++++- drivers/spi/spi-dw.c | 31 ++++++++++++---------- drivers/spi/spi-dw.h | 12 +++++++++ 4 files changed, 36 insertions(+), 15 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
