On 7/4/2024 4:13 PM, Fabio Estevam wrote:
Hi Ciprian,
On Thu, Jul 4, 2024 at 9:03 AM Ciprian Costea
<ciprianmarian.costea@xxxxxxxxxxx> wrote:
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -145,6 +145,7 @@ usdhc0: mmc@402f0000 {
clocks = <&clks 32>, <&clks 31>, <&clks 33>;
clock-names = "ipg", "ahb", "per";
bus-width = <8>;
+ disable-wp;
This should be better placed on the board dts instead of describing it
in the SoC dtsi.
Some boards may use a GPIO to describe the write protect pin via the
'wp-gpios' property.
Hello Fabio,
Thanks for your suggestion. I will update accordingly in version 2 of
this patch.
Best Regards,
Ciprian