[PATCH] arm64: dts: s32g: Disable usdhc write-protect

[Ciprian Costea <ciprianmarian.costea@xxxxxxxxxxx>]

SDHCI controller found on NXP S32G based platforms do not
define a pin for SD-Card write protection.

Hence, adding 'disable-wp' usdhc device-tree property in order to fix
observed warnings on SD boot as the following:
"host does not support reading read-only switch, assuming write-enable"

Signed-off-by: Ciprian Costea <ciprianmarian.costea@xxxxxxxxxxx>
---
 arch/arm64/boot/dts/freescale/s32g2.dtsi | 1 +
 arch/arm64/boot/dts/freescale/s32g3.dtsi | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index fc19ae2e8d3b..2ad8cfe964be 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -145,6 +145,7 @@ usdhc0: mmc@402f0000 {
 			clocks = <&clks 32>, <&clks 31>, <&clks 33>;
 			clock-names = "ipg", "ahb", "per";
 			bus-width = <8>;
+			disable-wp;
 			status = "disabled";
 		};
 
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index c1b08992754b..9d38bdc23cff 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
 /*
- * Copyright 2021-2023 NXP
+ * Copyright 2021-2024 NXP
  *
  * Authors: Ghennadi Procopciuc <ghennadi.procopciuc@xxxxxxx>
  *          Ciprian Costea <ciprianmarian.costea@xxxxxxx>
@@ -204,6 +204,7 @@ usdhc0: mmc@402f0000 {
 				 <&clks 31>,
 				 <&clks 33>;
 			clock-names = "ipg", "ahb", "per";
+			disable-wp;
 			status = "disabled";
 		};
 
-- 
2.45.2