Re: [PATCH v6 3/3] drm/stm: ltdc: add lvds pixel clock

[Philippe CORNU <philippe.cornu@xxxxxxxxxxx>]

On 6/21/24 16:55, Yannick FERTRE wrote:
> Hi Raphaël,
>
> Thanks for your patch, it will not merged due to a new clock management.
>
> Philippe,
>
> this patch will be replaced by another which manages all clocks that the 
> display controller
>
>   will need (pixel clock, bus clock reference clock).

Hi Raphaël & Yannick,
I applied 1 & 2 on drm-misc-next.
Many thanks,
Philippe :-)


> Best regards
>
>
> Le 26/02/2024 à 11:48, Raphael Gallais-Pou a écrit :
> > The STM32MP25x display subsystem presents a mux which feeds the loopback
> > pixel clock of the current bridge in use into the LTDC. This mux is only
> > accessible through sysconfig registers which is not yet available in the
> > STM32MP25x common clock framework.
> >
> > While waiting for a complete update of the clock framework, this would
> > allow to use the LVDS.
> >
> > Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@xxxxxxxxxxx>
> > Signed-off-by: Yannick Fertre <yannick.fertre@xxxxxxxxxxx>
> > ---
> > Changes in v2:
> >     - Fixed my address
> >     - Fixed smatch warning
> > ---
> >   drivers/gpu/drm/stm/ltdc.c | 19 +++++++++++++++++++
> >   drivers/gpu/drm/stm/ltdc.h |  1 +
> >   2 files changed, 20 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
> > index 5576fdae4962..23011a8913bd 100644
> > --- a/drivers/gpu/drm/stm/ltdc.c
> > +++ b/drivers/gpu/drm/stm/ltdc.c
> > @@ -838,6 +838,12 @@ ltdc_crtc_mode_valid(struct drm_crtc *crtc,
> >       int target_max = target + CLK_TOLERANCE_HZ;
> >       int result;
> > +    if (ldev->lvds_clk) {
> > +        result = clk_round_rate(ldev->lvds_clk, target);
> > +        DRM_DEBUG_DRIVER("lvds pixclk rate target %d, available %d\n",
> > +                 target, result);
> > +    }
> > +
> >       result = clk_round_rate(ldev->pixel_clk, target);
> >       DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, 
> > result);
> > @@ -1896,6 +1902,8 @@ void ltdc_suspend(struct drm_device *ddev)
> >       DRM_DEBUG_DRIVER("\n");
> >       clk_disable_unprepare(ldev->pixel_clk);
> > +    if (ldev->lvds_clk)
> > +        clk_disable_unprepare(ldev->lvds_clk);
> >   }
> >   int ltdc_resume(struct drm_device *ddev)
> > @@ -1910,6 +1918,13 @@ int ltdc_resume(struct drm_device *ddev)
> >           DRM_ERROR("failed to enable pixel clock (%d)\n", ret);
> >           return ret;
> >       }
> > +    if (ldev->lvds_clk) {
> > +        if (clk_prepare_enable(ldev->lvds_clk)) {
> > +            clk_disable_unprepare(ldev->pixel_clk);
> > +            DRM_ERROR("Unable to prepare lvds clock\n");
> > +            return -ENODEV;
> > +        }
> > +    }
> >       return 0;
> >   }
> > @@ -1981,6 +1996,10 @@ int ltdc_load(struct drm_device *ddev)
> >           }
> >       }
> > +    ldev->lvds_clk = devm_clk_get(dev, "lvds");
> > +    if (IS_ERR(ldev->lvds_clk))
> > +        ldev->lvds_clk = NULL;
> > +
> >       rstc = devm_reset_control_get_exclusive(dev, NULL);
> >       mutex_init(&ldev->err_lock);
> > diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
> > index 9d488043ffdb..4a60ce5b610c 100644
> > --- a/drivers/gpu/drm/stm/ltdc.h
> > +++ b/drivers/gpu/drm/stm/ltdc.h
> > @@ -44,6 +44,7 @@ struct ltdc_device {
> >       void __iomem *regs;
> >       struct regmap *regmap;
> >       struct clk *pixel_clk;    /* lcd pixel clock */
> > +    struct clk *lvds_clk;    /* lvds pixel clock */
> >       struct mutex err_lock;    /* protecting error_status */
> >       struct ltdc_caps caps;
> >       u32 irq_status;