This serie introduces a new DRM bridge driver for STM32MP257 platforms based on Arm Cortex-35. It also adds an instance in the device-tree and handle the inclusion of the driver within the DRM framework. First patch adds a new panel compatible in the panel-lvds driver, which is used by default on the STM32MP257. Changes in v6: - [1/3] Added Conor's Reviewed-by - [2/3] Fixed kernel test robot warnings - Rebased on latest drm-misc-next Changes in v5: - Fixed path in MAINTAINERS - Fixed compatible in driver Changes in v4: - Align dt-bindings filename and compatible - Remove redundant word in [1/6] subject - Fix example on typo - Some minor fixes on YAML syntax - Explicitly include linux/platform_device.h - Drop device-tree related patch after internal discussions - Rebase on latest drm-misc-next Changes in v3: - Changed the compatible to show SoC specificity - Fixed includes in dt-binding example - Added "#clock-cells" description in dt-binding example - Some minor fixes on typo Changes in v2: - Dropped [1/8] because already merged - Dropped [4/8] since not mandatory for this serie - [1/6]: Switch compatible and clock-cells related areas - [1/6]: Remove faulty #include in the example. - [1/6]: Add missing entry in MAINTAINERS - [2/6]: Removed CamelCase macros - [2/6]: Removed hard to read debug log - [3/6]: Fixed my address - [3/6]: Fixed smatch warning - [5/6]: Move changes to stm32mp255.dtsi Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@xxxxxxxxxxx> --- Raphael Gallais-Pou (3): dt-bindings: display: add STM32 LVDS device drm/stm: lvds: add new STM32 LVDS Display Interface Transmitter driver drm/stm: ltdc: add lvds pixel clock .../bindings/display/st,stm32mp25-lvds.yaml | 119 ++ MAINTAINERS | 1 + drivers/gpu/drm/stm/Kconfig | 11 + drivers/gpu/drm/stm/Makefile | 2 + drivers/gpu/drm/stm/ltdc.c | 19 + drivers/gpu/drm/stm/ltdc.h | 1 + drivers/gpu/drm/stm/lvds.c | 1226 ++++++++++++++++++++ 7 files changed, 1379 insertions(+) --- base-commit: de8de2c8acb931ce6197a04376a7078ccf50e821 change-id: 20240205-lvds-e084ec50e878 Best regards, -- Raphael Gallais-Pou <raphael.gallais-pou@xxxxxxxxxxx>