On 06/17/2024, André Draszik wrote: > In preparation for support for additional platforms, convert the phy > register access clock to using the clk_bulk interfaces. > > Newer SoCs like Google Tensor gs101 require additional clocks for > access to additional (different) register areas (PHY, PMA, PCS), and > converting to clk_bulk simplifies addition of those extra clocks. > > Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> Tested-by: Will McVicker <willmcvicker@xxxxxxxxxx> [...] Thanks, Will