On Tue, Jun 18, 2024 at 04:38:30PM +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@xxxxxxxxxxx>
>
> SG2042 use Synopsys dwcnshc IP for SD/eMMC controllers.
>
> SG2042 defines 3 clocks for SD/eMMC controllers.
> - AXI_EMMC/AXI_SD for aclk/hclk(Bus interface clocks in DWC_mshc)
> and blck(Core Base Clock in DWC_mshc), these 3 clocks share one
> source, so reuse existing "core".
No, this seems not correct. This should be the "bus" clk, and your above
sentence "aclk/hclk(Bus interface clocks in DWC_mshc)" implies this clk is
for bus
> - 100K_EMMC/100K_SD for cqetmclk(Timer clocks in DWC_mshc), so reuse
> existing "timer" which was added for rockchip specified.
> - EMMC_100M/SD_100M for cclk(Card clocks in DWC_mshc), add new "card".
I think this is "core" clk, no? Plz check which internal clks' clock
source is the so called EMMC_100M/SD_100M.
>
> Adding example for sg2042.
>
> Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
> ---
> .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 69 +++++++++++++------
> 1 file changed, 49 insertions(+), 20 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> index 4d3031d9965f..b53f20733f79 100644
> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> @@ -21,6 +21,7 @@ properties:
> - snps,dwcmshc-sdhci
> - sophgo,cv1800b-dwcmshc
> - sophgo,sg2002-dwcmshc
> + - sophgo,sg2042-dwcmshc
> - thead,th1520-dwcmshc
>
> reg:
> @@ -29,25 +30,6 @@ properties:
> interrupts:
> maxItems: 1
>
> - clocks:
> - minItems: 1
> - items:
> - - description: core clock
> - - description: bus clock for optional
> - - description: axi clock for rockchip specified
> - - description: block clock for rockchip specified
> - - description: timer clock for rockchip specified
> -
> -
> - clock-names:
> - minItems: 1
> - items:
> - - const: core
> - - const: bus
> - - const: axi
> - - const: block
> - - const: timer
> -
> resets:
> maxItems: 5
>
> @@ -63,6 +45,43 @@ properties:
> description: Specify the number of delay for tx sampling.
> $ref: /schemas/types.yaml#/definitions/uint8
>
> +if:
> + properties:
> + compatible:
> + contains:
> + const: sophgo,sg2042-dwcmshc
> +then:
> + properties:
> + clocks:
> + items:
> + - description: core clock
> + - description: timer clock
> + - description: card clock
> +
> + clock-names:
> + items:
> + - const: core
> + - const: timer
> + - const: card
> +else:
> + properties:
> + clocks:
> + minItems: 1
> + items:
> + - description: core clock
> + - description: bus clock for optional
> + - description: axi clock for rockchip specified
> + - description: block clock for rockchip specified
> + - description: timer clock for rockchip specified
> +
> + clock-names:
> + minItems: 1
> + items:
> + - const: core
> + - const: bus
> + - const: axi
> + - const: block
> + - const: timer
>
> required:
> - compatible
> @@ -96,5 +115,15 @@ examples:
> #address-cells = <1>;
> #size-cells = <0>;
> };
> -
> + - |
> + mmc@bb0000 {
> + compatible = "sophgo,sg2042-dwcmshc";
> + reg = <0xcc000 0x1000>;
> + interrupts = <0 25 0x4>;
> + clocks = <&cru 17>, <&cru 18>, <&cru 19>;
> + clock-names = "core", "timer", "card";
> + bus-width = <8>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> ...
> --
> 2.25.1
>
