Re: [PATCH v3 2/2] ASoC: cs530x: Support for cs530x ADCs

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On 18/06/2024 15:25, Mark Brown wrote:
On Tue, Jun 18, 2024 at 03:23:07PM +0100, Richard Fitzgerald wrote:
On 18/06/2024 15:18, Mark Brown wrote:
On Mon, Jun 17, 2024 at 02:01:02PM -0500, Paul Handrigan wrote:

+	case CS530X_DEVID:
+	case CS530X_REVID:

Are these really volatile?  I would expect them to have no defaults so
they must be read from the device, but once read I'd expect we could
cache the values.

If you mark a register non-volatile but without default, a
regcache_sync() will write it back out to the device. While that
doesn't necessarily do any harm, that depends on what these
registers do on write. Generally it makes me nervous to have
cache syncs writing to registers we don't want to write to.

Marking the register as read only should DTRT there, if not then that's
a regmap bug which should be fixed.

True but now we're adding extra callbacks and complexity just to
avoid marking a register volatile for some reason. The driver doesn't
need it to be cached, so why bother?




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