On Tue, Jun 11, 2024 at 03:54:24PM +0200, Martin Schiller wrote: > From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> > > Add the CPU port to gswip_xrx200_phylink_get_caps() and > gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal bus, > so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> > Reviewed-by: Vladimir Oltean <olteanv@xxxxxxxxx> > Acked-by: Hauke Mehrtens <hauke@xxxxxxxxxx> > --- Similar thing with the sign off here, and there are a few other patches on which I'm not going to comment on individually.
