Re: [PATCH v2 2/2] serial: sc16is7xx: hard reset the chip if reset-gpios is defined in dt

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On 6/5/24 23:32, Hugo Villeneuve wrote:
On Wed, 5 Jun 2024 20:55:21 +0800
Hui Wang <hui.wang@xxxxxxxxxxxxx> wrote:

On 6/5/24 19:19, Andy Shevchenko wrote:
On Wed, Jun 5, 2024 at 1:55 PM Hui Wang<hui.wang@xxxxxxxxxxxxx>  wrote:
On 6/5/24 18:30, Maarten Brock wrote:
...
# cat /sys/kernel/debug/regmap/spi0.0-port0/registers 1: 10 2: ff 3: 00
4: ec 5: ff 6: ff 7: ff 8: ff 9: ff a: ff b: ff c: ff d: ff e: ff f: 06
Hi Hui,
the best way to test a reset pin is with a voltmeter, if you can. It is
way too easy to get confused with reset pins values/polarities, etc.
Yes. got it.

By the way, if the reset pin is asserted, you cannot communicate with
the device, therefore dumping registers cannot work for debug purpose.

Got it.  I just use it to check the reset pin status. If the returned register values look reasonable (not many 0xff), It means the reset GPIO is de-asserted.

Thanks.

Hugo.








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