On Mon, Jun 03, 2024 at 09:21:11AM -0500, Andrew Davis wrote:
> On 6/1/24 7:15 AM, Siddharth Vadapalli wrote:
> > Enable PCIe0 instance of PCIe in Root Complex mode of operation with Lane 0
> > of the SERDES1 instance of SERDES. Also enable USB0 instance of USB to
> > interface with the Type-C port via the USB hub, by configuring the pin P05
> > of the GPIO expander on the EVM. Enable USB1 instance of USB in SuperSpeed
[...]
> > +
> > +&serdes0 {
> > + status = "okay";
> > + serdes0_usb_link: phy@0 {
> > + reg = <0>;
> > + cdns,num-lanes = <1>;
> > + #phy-cells = <0>;
> > + cdns,phy-type = <PHY_TYPE_USB3>;
> > + resets = <&serdes_wiz0 1>;
> > + };
> > +};
> > +
> > +&serdes1 {
> > + serdes1_pcie_link: phy@0 {
> > + reg = <0>;
> > + cdns,num-lanes = <1>;
> > + #phy-cells = <0>;
> > + cdns,phy-type = <PHY_TYPE_PCIE>;
> > + resets = <&serdes_wiz1 1>;
> > + };
> > +};
> > +
> > +&pcie0_rc {
> > + status = "okay";
>
> As much as I like these at the top, the new format rules seems to
> suggest "status" properties should go at the bottom of the node.
I failed to notice that. Thank you for pointing this out. I will fix
this in the v5 series.
[...]
Regards,
Siddharth.
