On Mon, Jun 03, 2024 at 11:27:48AM +0200, Christophe Roullier wrote:
> +static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
> +{
> + struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
> + const u32 clk_rate = clk_get_rate(dwmac->clk_eth_ck);
> +
> + switch (plat_dat->mac_interface) {
Should these be phy_interface? Does this clock depend on the interface
mode used with the PHY?
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