Hi Frank, On Wed, May 29, 2024 at 03:36:50PM -0400, Frank Li wrote: > Convert dt-binding spi-fsl-dspi.txt to yaml format. > > Addtional changes during convert: > - compatible string "fsl,ls1028a-dspi" can be followed by > fsl,ls1021a-v1.0-dspi > - Change "dspi0@4002c000" to "spi@4002c000" in example > - Reorder properties in example > - Use GIC include in example > > Signed-off-by: Frank Li <Frank.Li@xxxxxxx> > --- > > Notes: > pass dt_binding_check > > make dt_binding_check DT_SCHEMA_FILES=fsl,dspi.yaml > SCHEMA Documentation/devicetree/bindings/processed-schema.json > CHKDT Documentation/devicetree/bindings > LINT Documentation/devicetree/bindings > DTEX Documentation/devicetree/bindings/spi/fsl,dspi.example.dts > DTC_CHK Documentation/devicetree/bindings/spi/fsl,dspi.example.dtb > > .../devicetree/bindings/spi/fsl,dspi.yaml | 126 ++++++++++++++++++ > .../devicetree/bindings/spi/spi-fsl-dspi.txt | 65 --------- > 2 files changed, 126 insertions(+), 65 deletions(-) > create mode 100644 Documentation/devicetree/bindings/spi/fsl,dspi.yaml > delete mode 100644 Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt > > diff --git a/Documentation/devicetree/bindings/spi/fsl,dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml > new file mode 100644 > index 0000000000000..12a67b2cc25c8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml > @@ -0,0 +1,126 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/fsl,dspi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ARM Freescale DSPI controller > + > +maintainers: > + - Frank Li <Frank.Li@xxxxxxx> > + > +properties: > + fsl,spi-cs-sck-delay: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: > + a delay in nanoseconds between activating chip > + select and the start of clock signal, at the start of a transfer. > + fsl,spi-sck-cs-delay: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: > + a delay in nanoseconds between stopping the clock > + signal and deactivating chip select, at the end of a transfer. Thanks for this patch and for picking up on this task. But fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay are not controller properties as this schema makes them appear, but rather, child node properties. Could you try and take a look at how the previous attempt went, and incorporate some of its good parts? https://lore.kernel.org/linux-spi/20221111224651.577729-1-vladimir.oltean@xxxxxxx/
