On Wed, May 29, 2024 at 07:15:23AM +0100, Lad, Prabhakar wrote: > Hi Greg, > > On Fri, Mar 22, 2024 at 2:45 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Hi All, > > > > This patch series updates DT binding doc and scif driver to add support > > for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF > > interface. > > > > v3->v4 > > - patch 2/4 reverted back to version 2 > > - new patch 3/5 added > > - Added new reg type for RZ/V2H > > > > v2->v3 > > - Included DT validation patches > > - Added a new compat string for RZ/V2H(P) SoC > > - Added driver changes for RZ/V2H(P) SoC > > - Listed interrupts and interrupt-names for every SoC in if check > > > > Cheers, > > Prabhakar > > > > Lad Prabhakar (5): > > dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end > > dt-bindings: serial: renesas,scif: Validate 'interrupts' and > > 'interrupt-names' > > dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as > > required > > dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) > > (R9A09G057) SCIF support > > serial: sh-sci: Add support for RZ/V2H(P) SoC > > > Gentle ping. It is only 3 days since the merge window ended, please be patient for maintainers to catch up with their pending review queue. Especially for non-bugfixes like these that will be included in the 6.11-rc1 release, there is not any rush here for anyone just yet. For example, my todo queue currently has 1458 emails to process in it, this thread is somewhere in the middle. In the meantime, please help review other pending patches for the subsystem to help enable your patches to move toward the top of the queue. thanks, greg k-h
