Hi Geert, Thank you for the review. On Wed, May 22, 2024 at 1:39 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > Hi Prabhakar, > > On Tue, Apr 23, 2024 at 7:59 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > This patch introduces a function pointer, pmc_writeb(), in the > > struct rzg2l_pinctrl_data to facilitate writing to the PMC register. On > > the RZ/V2H(P) SoC, unlocking the PWPR.REGWE_A bit before writing to PMC > > registers is required, whereas this is not the case for the existing > > RZ/G2L family. This addition enables the reuse of existing code for > > RZ/V2H(P). Additionally, this patch populates this function pointer with > > appropriate data for existing SoCs. > > > > Note that this functionality is only handled in rzg2l_gpio_request(), as > > PMC unlock/lock during PFC setup will be taken care of in the > > pwpr_pfc_unlock/pwpr_pfc_lock. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > --- > > RFC->v2 > > - No change > > Thanks for the update! > > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > @@ -463,6 +464,11 @@ static const struct rzg2l_variable_pin_cfg r9a07g043f_variable_pin_cfg[] = { > > }; > > #endif > > > > +static void rzg2l_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, void __iomem *addr) > > Please pass the register offset instead of the virtual register address. > You do have pctrl->base here, and rzv2h_pmc_writeb() will need to use > pctrl->base for all other register writes anyway. > Agreed, I will pass the register offset (u16 offset) instead of virtual address. Cheers, Prabhakar