On 24/05/2024 12:05, Siddharth Vadapalli wrote:
> The Serdes1 instance of Serdes on J722S SoC can be muxed between PCIe0
Please use SERDES insted of Serdes or serdes as it is an abbreviation.
> and SGMII1. Update the "serdes_ln_ctrl" node adding support for the lane
> mux of Serdes1. Additionally, set the default muxing for Serdes1 Lane0 to
> PCIe0.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx>
> ---
> Current patch is v1. No changelog.
>
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 ++-
> arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 5 +++--
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> index a3bda39cc223..16c6ab8ee07e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> @@ -401,7 +401,8 @@ &sdhci1 {
> };
>
> &serdes_ln_ctrl {
> - idle-states = <J722S_SERDES0_LANE0_USB>;
> + idle-states = <J722S_SERDES0_LANE0_USB>,
> + <J722S_SERDES1_LANE0_PCIE0_LANE0>;
> };
>
> &serdes0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> index b069cecebfd9..48b77e476c77 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> @@ -96,8 +96,9 @@ usb1: usb@31200000{
> &main_conf {
> serdes_ln_ctrl: mux-controller@4080 {
> compatible = "reg-mux";
> - reg = <0x4080 0x4>;
> + reg = <0x4080 0x14>;
> #mux-control-cells = <1>;
> - mux-reg-masks = <0x0 0x3>; /* SERDES0 lane0 select */
> + mux-reg-masks = <0x0 0x3>, /* SERDES0 lane0 select */
> + <0x10 0x3>; /* SERDES1 lane0 select */
Why not introduce this right in the patch where you add serdes_ln_ctrl mux node?
> };
> };
--
cheers,
-roger
