Add a property with an array of phandles to devices that have pins that
are capable to wakeup the SoC from Partial-IO. In Partial-IO everything
is powered off including the DDR. Only pins belonging to a couple of
devices are active and wakeup the system on activity.
Signed-off-by: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx>
---
Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
index 7f06b1080244..c8ed0dd4fee4 100644
--- a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
+++ b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
@@ -61,6 +61,12 @@ properties:
mboxes:
minItems: 2
+ ti,partial-io-wakeup-sources:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: |
+ List of phandles to devicetree nodes that can wakeup the SoC from the
+ Partial IO poweroff mode.
+
ti,host-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
--
2.43.0
